Theory/CSE/Semester III

CSPC-313 Computer Architecture & Organisation

Teaching Scheme

Credit

Marks Distribution

Duration of End Semester Examination

LTPInternal AssessmentEnd Semester ExaminationTotal

3

1

0

4

Maximum Marks: 40Maximum Marks: 60100

3 Hours

Minimum Marks: 16Minimum Marks: 2440

Unit-I

Register Transfer and Micro operations: Register transfer language , register transfer , bus & memory transfer , logic micro-operations, shift micro-operation.

Basic Computer Organization: Instruction codes , computer instructions , timing & control , instruction cycles, memory reference instruction, input/output & interrupts, complete computer description & design of basic computer.

Unit-II

Control Unit: Hardwired vs Micro programmed control unit.

Central Processing Unit: General register organization , stack organization, instruction format, addressing modes, data transfer & manipulation, program control, RISC, CISC.

Input-Output Organization: Peripheral devices , I/O interface , Modes of data transfer: Programmed I/O, Interrupt-Initiated I/O , DMA transfer , I/O processor , Serial Communication.

Unit-III

Computer Arithmetic: Unsigned , signed and floating-point data representation , addition , subtraction , multiplication and division algorithms , Booth's multiplication algorithm.

Memory Unit: Memory hierarchy , processor vs. memory speed , main memory , auxiliary memories , high-speed memories , cache memory , associative memory , virtual memory , memory management hardware.

Unit-IV

Introduction to Parallel Processing: Flynn's classification , pipelining , arithmetic pipeline , instruction pipeline , characteristics of multiprocessors , inter connection structures , inter processor arbitration , inter processor communication & synchronization.

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